STM32F4 Discovery + HY32D TFT LCD

STM32F4

Discovery 

+ HY32D TFT LCD

The STM32F4 Discovery board has an FSMC ( Flexible Static Memory Controller ) which supports the connection of an LCD in parallel mode. I have 3 STM32F4 Discovery boards, so I decided to use one to control the HY32D TFT LCD I bought off Ebay, with absolutely useless example code for an 8051 type microcontroller

http://www.element14.com/community/groups/development-tools/blog/2012/05/26/stm32f4-discovery-hy32d-tft-lcd

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메모리를 사용하는 TFT LCD제어 - FSMC 사용

https://sites.google.com/site/miguelmoreto/home-eng/projects/stm32f4-adapter-board

LCD Pin Name	STM32F407 pin name	Function
D0	PD14 (FSMC-D0)	Data bit 0
D1	PD15 (FSMC-D1)	Data bit 1
D2	PD0 (FSMC-D2)	Data bit 2
D3	PD1 (FSMC-D3)	Data bit 3
D4	PE7 (FSMC-D4)	Data bit 4
D5	PE8 (FSMC-D5)	Data bit 5
D6	PE9 (FSMC-D6)	Data bit 6
D7	PE10 (FSMC-D7)	Data bit 7
D8	PE11 (FSMC-D8)	Data bit 8
D9	PE12 (FSMC-D9)	Data bit 9
D10	PE13 (FSMC-D10)	Data bit 10
D11	PE14 (FSMC-D11)	Data bit 11
D12	PE15 (FSMC-D12)	Data bit 12
D13	PD8 (FSMC-D13)	Data bit 13
D14	PD9 (FSMC-D14)	Data bit 14
D15	PD10 (FSMC-D15)	Data bit 15
CS	PD7 (FSMC-NE1)	Chip-select
RS	PD11 (FSMC-A16)	Register/RAM select
WR	PD5 (FSMC-NWE)	Write signal
RD	PD4 (FSMC-NOE)	Read signal
BLCNT	PC6 (TIM3_CH1)	LCD BackLight control (PWM)
TP_IRQ	PD6	Touch Panel interrupt signal
TP_CS	PA15 (SPI3_NSS)	Touch Panel SPI chip-select
TP_SCK	PC10 (SPI3_SCK)	Touch Panel SPI clock
TP_SI	PC12 (SPI3_MOSI)	Touch Panel SPI Slave Input
TP_SO	PC11 (SPI3_MISO)	Touch Panel SPI Slave Output

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erix_kl 2013. 11. 1 오후 5:58

Hello,

 

I use stm32f4discovery with HY32D display. Can someone explain me, how data is sent to HY32D with this code:
#define LCD_REG (*((volatile unsigned short *) 0x600000000))

#define LCD_RAM (*((volatile unsigned short *) 0x600200000))

...

void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue)

{

     LCD_REG = LCD_Reg;

     LCD_RAM = RegValue;

}

How this code is connected with FSMC?

0x600000000 is STM32F4 register address?

Thanks

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buzlecleir 2013. 12. 5 오전 5:07 (다음에 대한 응답 erix_kl)

Hello Eriks,

 

Maybe I'm too late.

 

There are two types of data to send to the display:

- data to configure registers (the pin RS must be at low level)

- data to fill SRAM buffer (the pin RS must be at high level)

 

If you go to line 568 of SSD1289.c, you can see:

GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);

// A16 -> RS

So the signal RS of display depends of the bit 16 of FSMC address.

 

When you write LCD_REG = x, (@0x600000000) you send a data to the register of display because for FSMC the address 0x600000000 means pin A16 must be at low level

When you write LCD_RAM = x, (@0x600200000) you send a data to the SRAM buffer of display because for FSMC the address 0x600200000 means pin A16 must be at high level

 

Tell me if it's not clear.=

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https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https%3a%2f%2fmy%2est%2ecom%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex_mx_stm32%2fUnderstanding%20STM32F4%20FSMC&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=1147

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Understanding STM32F4 FSMC Hello,  I am new to STM32F4 and I have been digging into documentation for the lasts two weeks. My application uses a 320x240 LCD display and is managed through the FSMC bus. If I have understood correctly the FSMC manages four banks of memory and each one is divided in four memory regions.  I am only interested in Bank1, which is the NOR/PSRAM memory, but I have some questions. What do NE1, NE2, NE3 and NE4 signals do? Do they select the Bank or do they select the region of memory (from 0x60000000 to 0x6FFFFFFF) once a Bank has been selected. In that case, how can I select a Bank?  How are these signals (NEx) managed? Do I have to worry about them or the FMSC manages them internally? The FSMC bus has 26 bits for the address, but the reference manual says that bits 25 and 26 of the address select the one of the four memory regions of Bank1. How can these bits be controlled? As you can see I am pretty lost. Any help would be appreciated.  Thanks in advance,  Edgar.

Tags: #fsmc #stm32 In traditional processor boards, you would have an address decoder of 1-of-N type  (think of 74xx138 for example), which inputs is connected to the higher-most address bits, and outputs go to chip selects of connected memories. In this particular case, there is a cascade: one decoder which sets its output active when address bits 31..28 = 0110 (0x6), which is an "enable" input to other 1-of-4 decoder with inputs tied to address bits 27..26 and producing the four NEx outputs. In other words, if you read/write anywhere from/to 0x60000000-0x63FFFFFF, NE1 gets (automatically) active; if you read/write from/to 0x640000000-0x67FFFFFF, NE2 gets active; etc. So, you simply tie NEx to the memory's (memory-mapped device's, here: LCD's) chip select pin, address signals to address pins, data to data pins, read/write signals to read/write pins; and then (after having properly set up the FSMC unit) simply read/write to the corresponding area and FSMC takes care of wiggling the appropriate pins automatically. JW